DFT-Design Engineer 3 (Citizens) Remote

Job description: Looking for a DFT (Design for Test) engineer to join our highly qualified, diverse individuals as part of our ASIC design team. Responsibilities: • Responsible for DFT (Design for Testability) aspects of ASIC Design thorough understanding of digital design concepts • Adhering to Northrop Grumman ASIC development process. • Knowledgeable in VHDL, Verilog or System Verilog RTL coding and highly proficient in DFT methodologies. • Responsible for operating in a team environment and collaborating across the different teams as required to accomplish the goals. Basic Qualifications Bachelor's degree in Electrical or Computer Engineering with 8+ years’ experience. • Bachelor’s degree with 8 years of experience, a Master’s degree with 6 years of experience • U.S. Citizenship is required • Experience in full product life cycle of ASIC Design • Experience with Cadence and/or Mentor test insertion and ATPG tools • Experience with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTAG) • Experience with memory BIST and logic BIST • Experience generating test patterns and analyzing and debugging test failures • Experience working with test engineers to implement ATPG vectors on tester hardware • Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting languages such as TCL, Python or Perl • Effective communication and presentation skills and high proficiency in technical problem solving Preferred Qualifications: • Master's Degree in Electrical or Computer Engineering • Expertise of using Cadence Modus DFT tools • Knowledge of Synthesis, P&R and Static Timing Analysis would be a plus Job Type: Contract Pay: $90.00 - $100.00 per hour Work Location: Remote Apply Job! Apply to this Job